Integrated circuits (IC) architectures have evolved to incorporate a number of heterogeneous functions in a single package, where each function is performed by a separate IC the or chip-scale package (CSP). Such an architecture is sometimes referred to as a system-in-package (SiP). One type of SiP architecture involves mounting multiple IC die to an interposer, which is in turn mounted to a package substrate. The interposer includes through-die vias (TDVs), also referred to as through-silicon vias (TSVs), which connect metallization layers on both its upper and lower surfaces. The metallization layers are used to convey electrical signals among the multiple IC die, and between each of multiple IC the to the package substrate. This type of SiP architecture is sometimes referred to as a 2.5 dimensional (2.5D) package. However, use of a 2.5D architecture for a SiP package significantly increases costs, as a separate interposer must be designed, manufactured, and tested.